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| [ak4386] ms0280-j-01 2008/10 - 1 - ? a ak4386 x????|???|; ? ?
? ?? 24 ??? dac pb{ ? ! e+tx????????? ???qb?????~?????m?>;`os?z 3v ?^tsmo dr=100db ? a r` om?b{ o w?????tx??????3????? (scf) ?>;`os?z??? ??t?? ^ sw?=?~ 3`?b{ ak4386 xz mp3 ? 3;+ sw???;+t| stb, tv sw?|???|;+t7 &pb{ ak4386 x ? 16pin tssop ?-?to? ^?z, x ???_n`?b{ ? ? ? sampling rate: 8khz 96khz ? 24-bit 8 times fir digital filter ? scf with high tolerance to clock jitter ? single-ended output buffer ? digital de-emphasis for 44.1khz sampling ? i/f format: 24-bit msb justified, 16/24-bit lsb justified, i 2 s compatible ? master clock: 512/768/1024/1536fs for half speed (8khz 24khz) 256/384/512/768fs for normal speed (8khz 48khz) 128/192/256/384fs for double speed (48khz 96khz) ? cmos input level ? thd+n: ? 86db ? dr, s/n: 100db(@vdd=3.0v) ? power supply: 2.2 to 3.6v ? ta = ? 20 85 c (et), ? 40 85 c (vt) ? 16pin tssop lrck bick sdti audio data interface mclk dif1 ? modulator lout 8x interpolator scf ctf rout vdd vss vcom de-emphasis control pdn clock divider dfs1 dfs0 ? modulator 8x interpolator scf ctf dem test dif0 100db 96khz 24-bit 2ch ? dac ak4386 [ak4386] ms0280-j-01 2008/10 - 2 - |??????? AK4386ET ? 20 +85 c 16pin tssop (0.65mm pitch) ak4386vt ? 40 +85 c 16pin tssop (0.65mm pitch) akd4386 ak4386 a;??? e? ? sdti lrck dfs1 dem mclk bick pdn dfs0 top view 8 7 6 5 4 3 2 1 9 10 11 12 13 14 15 16 vdd vss rout lout vcom dif1 test dif0 [ak4386] ms0280-j-01 2008/10 - 3 - e??; no. pin name i/o function 1 mclk i master clock input pin 2 bick i audio serial data clock pin 3 sdti i audio serial data input pin 4 lrck i input channel clock pin 5 pdn i full power down mode pin ?l? : power down, ?h? : power up 6 dfs0 i sampling speed select 0 pin 7 dfs1 i sampling speed select 1 pin 8 dem i de-emphasis filter enable pin ?l? : off, ?h? : on (d e-emphasis of fs=44.1khz is enable.) 9 dif0 i audio interface format 0 pin 10 rout o rch analog output pin 11 lout o lch analog output pin 12 vcom o common voltage output pin, 0.55 vdd normally connected to vss with a 4.7 f (min. 1 f, max. 10 f) electrolytic capacitor. 13 vss - ground pin 14 vdd - power supply pin, 2.2 3.6v 15 dif1 i audio interface format 1 pin 16 test i test pin this pin should be connected to vdd. note: all digital input pins should not be left floating. ?;`sme?w rgtmmo ?;`sm z?e?x<gw ? ??mz & ~t rg`o<^m{ e? ? analog lout, rout |?? [ak4386] ms0280-j-01 2008/10 - 4 - ? 07 g (vss=0v; note 1 ) parameter symbol min max units power supply vdd ? 0.3 4.6 v input current, any pin except supplies iin - 10 ma digital input voltage vind ? 0.3 vdd+0.3 v AK4386ET ta ? 20 85 c ambient temperature (powered applied) ak4386vt ta ? 40 85 c storage temperature tstg ? 65 150 c note 1. ?yx ?o????e?t 0b? ?pb{ ?? : \w ?? qh ep?;`h ?z??? ub?\quk??b{ ?hz w ?^x- a^??d?{ * ? ?^ e (vss=0v; note 1 ) parameter symbol min typ max units power supply vdd 2.2 3.0 3.6 v note 1. ?yx ?o????e?t 0b? ?pb{ ?? : ????3??tgl^?om? e??w]?;t`oxz ptpx y ?mtv?bwp g ] ??<^m{ [ak4386] ms0280-j-01 2008/10 - 5 - ??? ? q (ta=25 c; vdd=3.0v; vss=0v; fs=44.1khz, 96khz; bick=64fs; signal frequency=1khz; 24bit data; measurement frequency=20hz 20khz at fs=44.1khz, 20hz 40khz at fs=96khz; unless otherwise specified) parameter min typ max units dynamic characteristics: resolution 24 bits fs=44.1khz bw=20khz 0dbfs ? 60dbfs ? 86 ? 37 ? 76 - db db thd+n fs=96khz bw=40khz 0dbfs ? 60dbfs ? 84 ? 34 - - db db dr ( ? 60dbfs with a-weighted) 92 100 db s/n (a-weighted) 92 100 db interchannel isolation 80 100 db dc accuracy: interchannel gain mismatch 0.2 0.5 db gain drift 100 - ppm/ c output voltage ( note 2 ) 1.85 2.0 2.15 vpp load resistance ( note 3 ) 10 k load capacitance 25 pf power supplies power supply current normal operation (pdn pin = ?h?, fs=44.1khz) normal operation (pdn pin = ?h?, fs=96khz) power save mode (pdn pin = ?h?, mclk stop) full power-down mode (pdn pin = ?l?) ( note 4) 6 6.5 1.5 10 9 10 2.5 50 ma ma ma a note 2. z? ?yw??-?? (0db) { vdd ?yt z?`?b{ vout = 0.67 vdd (typ) { note 3. ac ?yt 0b? ?pb{ note 4. ?ow???? ??e?? vdd ?hx vss t{ `hw ?pb{ [ak4386] ms0280-j-01 2008/10 - 6 - ???? ? q (ta=25 c; vdd=2.2 3.6v; fs=44.1khz; dem=off) parameter symbol min typ max units dac digital filter: passband ( note 5) 0.05db ? 6.0db pb 0 - 22.05 20.0 - khz khz stopband ( note 5 ) sb 24.1 khz passband ripple pr 0.01 db stopband attenuation sa 64 db group delay ( note 6 ) gd - 24.0 - 1/fs digital filter + scf + ctf: frequency response 0 20khz 40khz ( note 7) fr - - 0.5 1.0 - - db db note 5. ? ? qw * t :x fs ( 3a?????? ) t z?`?b{ note 6. ????????t?? ? ?pz???u ???t??^?ot???? ??u z?^???pwpb{ note 7. fs=96khz { dc ? q (ta=25 c; vdd=2.2 3.6v) parameter symbol min typ max units high-level input voltage low-level input voltage vih vil 70%vdd - - - - 30%vdd v v input leakage current iin - - 10 a [ak4386] ms0280-j-01 2008/10 - 7 - ????? ? q (ta=25 c; vdd=2.2 3.6v) parameter symbol min typ max units master clock frequency half speed mode (512/768/1024/1536fs) normal speed mode (256/384/512/768fs) double speed mode (128/192/256/384fs) duty cycle fclk fclk fclk dclk 4.096 2.048 6.144 40 36.864 36.864 36.864 60 mhz mhz mhz % lrck frequency half speed mode (dfs1-0 = ?10?) normal speed mode (dfs1-0 = ?00?) double speed mode (dfs1-0 = ?01?) duty cycle fsh fsn fsd dclk 8 8 48 45 24 48 96 55 khz khz khz % audio interface timing bick period half speed mode normal speed mode double speed mode bick pulse width low pulse width high bick ? ? to lrck edge ( note 8) lrck edge to bick ? ? ( note 8) sdti hold time sdti setup time tbck tbck tbck tbckl tbckh tblr tlrb tsdh tsds 1/128fs 1/128fs 1/64fs 70 70 40 40 40 40 ns ns ns ns ns ns ns ns ns power-down & reset timing pdn pulse width ( note 9 ) tpd 4 c ms note 8. \wf ?x lrck w?q bick w ? ? u os?sm?otf `om?b{ note 9. ak4386 x pdn pin = ?l? p???^??b{ ? ?x vcom pin t ? ^?????w0? ? (c) t z?`?b{ tpd = 4 c. 4.7 f tx tpd x min. 19ms qs??b{ vcom pin t ? b????w0?x 1 f c 10 f q`o<^m{ dif1-0 pin ? ~? 8qh ?xz pdn pin p???`o<^m{ [ak4386] ms0280-j-01 2008/10 - 8 - ????? t 1/fclk tclkl vih tclkh mclk vil 1/fs lrck vih vil tbck tbckl vih tbckh bick vil clock timing lrck vih vil tblr bick vih vil tlrb tsds sdti vil tsdh vih audio interface timing tpd pdn vil power down & reset timing [ak4386] ms0280-j-01 2008/10 - 9 - ?^ ? 3a??? ak4386 t ?as???xz mclk, bick, lrck pb{ mclk q lrck x ?8b? ?axk??buz? ??d? ?axk??d?{ mclk x?????3??????q ? ! e+t?;^??b{ mclk * t :x ??^?? mclk q lrck wt? o ?p ?u z^??b{ ?hz dfs1-0 pin p half speed t??z normal speed t??t| double speed t??? ? r`?b ( table 1 ) { auto t?? (dfs1 pin = dfs0 pin = ?h?) w ?txz????e??t??x mclk * t :t?? ? ? ^??b ( table 2) { ?^ (pdn pin = ?h?) t mclk u-?lh ?txz ak4386 x???t??ts? ? $t o ?? ???u???z??? z?x vcom ?y? z?`?b{ mclk ?6 ???z????ur ?^? ?b{ ?o d ?? sw???r ? (pdn pin = ?l? ?h?) xz mclk, lrck u ??^???p??? ? y 6pb{ ?^ t dif1-0 pin ? ~? 8qh ?xz pdn pin p???`o<^m{ mode dfs1 dfs0 fs mclk frequency normal speed l l 8 48khz 256/384/512/768fs double speed l h 48 96khz 128/192/256/384fs half speed h l 8 24khz 512/768/1024/1536fs auto h h 8 96khz table 2 table 1. system clock example mclk frequency sampling speed mode fs 512/768fs normal speed 8 48khz 128/192/256/384fs double speed 48 96khz 1024/1536fs half speed 8 24khz table 2. auto mode |???|????????? 4 w???????u dif1-0 pin w ? ( table 3 ) t??p ? rpv?b{ ?t??q? msb ??? ?z 2?s ??y??w???????p bick wqj u?p???^??b{ mode 3 ? 16 ???p ?;b? ?txz bick 48fs t`o???wsm lsb tx ?0? ? ??b?tz?`xx bick = 32fs t`o< ^m{ mode dif1 dif0 sdti format bick figure 0 l l 16bit, lsb justified 32fs figure 1 1 l h 24bit, lsb justified 48fs figure 2 2 h l 24bit, msb justified 48fs figure 3 3 h h 16/24bit, i 2 s compatible 48fs or 32fs figure 4 table 3. audio interface format [ak4386] ms0280-j-01 2008/10 - 10 - lrck bick(32fs) 0 110 2 3 9 1112131415 0 12 3 1 0 10 9 1112131415 sdti(i) don't care 1 0 15 14 13 210 15 14 13 12 12 don't care sdti-15:msb, 0:lsb sdti(i) 15 14 13 76543 210 15 14 13 15 76543 210 bick(64fs) 0 118 2 3 19 20 31 0 1 2 3 1 0 18 19 20 31 17 17 lch data rch data figure 1. mode 0 timing lrck bick(64fs) 0 1 224310 12 1 0 31 24 89 89 sdti(i) don't care 0 8 10 23:msb, 0:lsb lch data rch data 23 8 don't care 23 1 figure 2. mode 1 timing lrck bick(64fs) 0 1 2202124310 12 1 0 22 20 21 31 24 22 23 23 sdti(i) don't care 0 0 23:msb, 0:lsb lch data rch data don't care 4321 23 22 23 22 23 1 2 3 4 figure 3. mode 2 timing lrck bick(64fs) 0 1 225 21 24 0 12 1 0 22 25 21 24 22 23 23 3 sdti(i) don't care 0 0 23:msb, 0:lsb lch data rch data don't care 4321 23 22 23 22 1 2 3 4 figure 4. mode 3 timing [ak4386] ms0280-j-01 2008/10 - 11 - ?????3???? iir ????t?? fs=44.1khz 0 w?????3???? (50/15 s ? q ) ? o `om?b{ ????? t 0`o dem pin = ?h? u ? r^?hz?????3????u?ts??b{ half speed, double speed mode xz?????3????x off pb{ mode dfs1 pin dfs0 pin dem pin de-emphasis filter l l l off normal speed l l h on double speed l h * off half speed h l * off h h l off auto h h h on (note) table 4. de-emephasis filter (*: don?t care) note. normal speed z fs=44.1khz 0 w?????3????u?ts??b{ half speed, double speed mode xz?????3????x off pb{ ????; ak4386 x pdn pin ? ?l? tb?\qp????t??tpv?b{\wz ?t????????u ???^??b{\w???x ?o d ?t ?c s?lo<^m{ ak4386 x pdn pin = ?l? z dac z?x hi-z ts??b{?hz ?^ (pdn pin = ?h?) t mclk u-?lh ? txz ? $t o ?????u???z??? z?x vcom ?y? z?`?b{ mclk ?-?? ? txz ?h? ?hx ?l? t{ `o<^m{ mode pdn pin mclk dac output state 0 l don?t care hi-z full power down 1 supplied normal output normal 2 h not supplied vcom voltage power save table 5. power down mode [ak4386] ms0280-j-01 2008/10 - 12 - (1) pdn pin t?????? normal operation internal state pdn power-down normal operation gd gd ?0? data d/a out (analog) d/a in (digital) clock in mclk, bick, lrck (2) (4) external mute (6) (4) (2) mute on (3) (5) don?t care (1) notes: (1) 19ms ? wz pdn pin ? ?l? t`o<^m{ (vcom pin q vss t 4.7 f w????mzh ?{ ) (2) ???? ??t 0`o??? z?x ? (gd) ??j?b{ (3) ??? z?x hi-z ts??b{ (4) pdn ??w? (? ?) t? 3 4lrck ? ot??????u z?^??b{ \w??x???u ?0? w ?p? z?^??b{ (5) ???? y 6 (pdn pin = ?l?) px??? ?? (mclk, bick, lrck) ?-??\qupv?b{ (6) ?????? (4) ue jts? ?xz??? z??? ?p???`o<^m{ figure 5. power-down/up sequence example 1 [ak4386] ms0280-j-01 2008/10 - 13 - (2) mclk -t????? (pdn pin = ?h?) normal operation internal state power-save normal operation gd gd d/a out (analog) d/a in (digital) clock in mclk, bick, lrck (2) (3) external mute (5) vcom (2) mclk stop pdn pin power-down power-down (4) (4) (4) hi-z (6) (6) (5) (1) notes: (1) ?o d ??z 19ms ? wz pdn pin ? ?l? t`o<^m{ (vcom pin q vss t 4.7 f w???? mzh ?{ ) (2) ???? ??t 0`o??? z?x ? (gd) ??j?b{ (3) ???????w ???-??\qupv?b{\wt ?0? ???? ??`osx\qpz mclk 6 ???w?;?0npv?b{ (4) pdn pin w? (? ?) t| mclk w ?? / -t? 3 4lrck ? ot??????u z?^??b{\ w??x???u ?0? w ?p? z?^??b{ (5) ??? y 6 (mclk - ) px??? ?? (bick, lrck) ?-??\qupv?b{ (6) ?????? (4) ue jts? ?xz??? z??? ?p???`o<^m{ figure 6. power-down/up sequence example 2 [ak4386] ms0280-j-01 2008/10 - 14 - 3a ?- figure 7 x3a ? ?pb{ . $ss?q ?tmmox a??? (akd4386) ?? `o<^m{ mclk 1 bick 2 sdti 3 lrck 4 pdn 5 dfs0 6 dfs1 7 dem 8 test 16 dif1 15 vdd 14 vss 13 vcom 12 lout 11 rout 10 dif0 9 master clock mode setting ak4386 fs 24bit audio data reset & power down 64fs 4.7u 0.1u + rch out lch out analog ground digital ground a nalog suppl y 2.2 to 3.6v + 10u (c) ? : - ak4386 w vss q *%???? sw????x zo `o<^m{ - lout/rout u0? q ?y?? ?b? ?x ?t ?? ??o<^m{ - vcom tx 1 f ? 10 f ?<w????mzo<^m{ - ?ow???? ??e?x|??t`smp<^m{ figure 7. typical connection diagram 1. ????q ?ow????? ?oq????w ?mtx g ??`o<^m{ z vdd tx3aw??? ?o? ???e?? ?p??`o<^m{3aw????x???q????p zo ` pc ??? w ?ot mq\?p ? `o<^m{ ?0?w????????xs??x ?oe?wxt ? `o<^ m{ 2. , j ?y vdd q vss w ??)u??? z??? ? `?b{ vcom x??? ??wt? ?yq`o??? ?b{\we?tx 4.7 f sw ?r???? vss qwt ? `o<^m{ vcom pin t? ?v? l oxmz?d?{???? ??z ?t???x! e+?w????? ?z?h?z vcom pin t?p v?izm`o<^m{ 3. ??? z? ak4386 w??? z?x3????? z?tslos?z z??x vcom ?y (0.55 vdd) ? t 2.0vpp(typ@vdd=3.0v) pb{ o w ? ! e+u c \b?3?e????x o w??????3 ????? (scf) q ???? (ctf) pn 0^??b{ ????w????x 2?s ??y?? (2 w 4 : ) p 7fffffh(@24bit) t 0`ox yw??-??z 800000h(@24bit) t 0`ox ?w??-??z 000000h(@24bit) pwg y ?x vcom ?y (0.55 vdd) u z?^??b{ ??? z?xz vcom+ : mv sw dc |?????mh?z w?;px???p dc r ? ??`?b{ [ak4386] ms0280-j-01 2008/10 - 15 - ?-? 0.1 0.1 0 10 detail a seating plane 0.10 0.17 0.05 0.22 0.1 0.65 5.0 1.10max a 1 8 9 16 16 p in tssop ( unit: mm ) 4.4 6.4 0.2 0.5 0.2 material & lead finish package molding compound: epoxy lead frame material: cu lead frame surface treatment: solder (pb free) plate [ak4386] ms0280-j-01 2008/10 - 16 - ???? (AK4386ET) akm 4386et xxyyy 1) pin #1 indication 2) date code : xxyyy (5 digits) xx: lot# yyy: date code 3) marketing code : 4386et [ak4386] ms0280-j-01 2008/10 - 17 - ???? (ak4386vt) akm 4386vt xxyyy 4) pin #1 indication 5) date code : xxyyy (5 digits) xx: lot# yyy: date code 6) marketing code : 4386vt [ak4386] ms0280-j-01 2008/10 - 18 - ~ do date (yy/mm/dd) revision reason page contents 03/12/01 00 s [ 08/10/23 01 a ? ?c AK4386ET ? ?c{ vt [q et [w???3??? w{ oas ??? ? ? {tgl^?h a ?zt|z a ?w?7tmv?`oxz a ?~ 3wh?t'sx!?b? \quk??b{ hm?`oz]?;?u |wmtxz? {t l`h ?cu7 yw?wpk?\q ?t? r pzk?mxt ?? 3? r pt]? y<^m{ ? ? {t l^?h ?c~ $?w?;ti?`h h~ w tb? ??vz? tvzfw w vbt 0b? ??tmv?`oxz ptxfw y ? ?o?wpxk??d?wpz]? ?<^m{ ? ? {gl a ?uz?? 8t|z?u?got ?? ?t ? t??? t? pb? ?z zb?mt ?ot,nx z?du ?apb{ ? ??;+z? ? ?z? |;;+zj?? m?;;+srzfw ?~;+w? ?? ?^ ? ?uz ??hx ??e?cz \?z .zr? s? o gs ??t?b\qu ' y^?? ?os??o?m ?t q?a{^??; mtt a ???;^?? ?xz ?c? 2tt e tw {?t?? ???s ?<^m{ ? \w ?? {? ?ct\o`h; mtt a ???;^?h ?ztxzfw?;t? \c? ? sw y ? ~ ?o?wpxk??d?wp]? ?<^m{ ? sl7w 8 st??\w ???w o? ??ct g; mtt a ?u?;^?zfw?; t? ? su \ah ?x ?osl7to] ? r?hx4 ?`o ?v?bwp]? ?<^m{ |
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